The use of thin film ceramic silica coatings as protective and dielectric layers for electronic devices is known in the art. Currently, SiO.sub.2 is used as the back-end dielectric in semiconductor devices. However, as chip function integration increases, back end wiring densities also increase. Because of this, there exists a greater need for intra-level insulators having lower dielectric constants than the presently used SiO.sub.2. This is crucial in order to reduce delays due to cross-talk and stray capacitance. Presently used SiO.sub.2 has a dielectric constant of 4, which may limit its use because of the potential cross-talk and RC delays.
Moreover, because of reduced spacings between lines, the need for the insulation to conformally fill small spaces is increasingly important.
Since device density is also increasing with increasing complexity, the need to electrically insulate devices from each other has become important as well. With smaller inter-device dimensions, providing trenches conformally filled with dielectrics between devices, will become increasingly difficult.